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fayalite/crates/fayalite/tests/sim/expected/test_enum_structural_eq.txt

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Simulation {
state: State {
insns: Insns {
state_layout: StateLayout {
ty: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 2,
debug_data: [
SlotDebugData {
name: "",
ty: Enum {
HdlNone,
HdlSome,
},
},
SlotDebugData {
name: "",
ty: Enum {
HdlNone,
HdlSome,
},
},
],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 13,
debug_data: [
SlotDebugData {
name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::a",
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
},
SlotDebugData {
name: "",
ty: UInt<3>,
},
SlotDebugData {
name: "",
ty: UInt<2>,
},
SlotDebugData {
name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::b",
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
},
SlotDebugData {
name: "",
ty: UInt<3>,
},
SlotDebugData {
name: "",
ty: UInt<2>,
},
SlotDebugData {
name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::eq",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::structural_eq",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::bit_eq",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
sim_only_slots: StatePartLayout<SimOnlySlots> {
len: 0,
debug_data: [],
layout_data: [],
..
},
},
memories: StatePartLayout<Memories> {
len: 0,
debug_data: [],
layout_data: [],
..
},
},
insns: [
// at: module-XXXXXXXXXX.rs:1:1
0: Const {
dest: StatePartIndex<BigSlots>(10), // (0x1) SlotDebugData { name: "", ty: Bool },
value: 0x1,
},
1: Const {
dest: StatePartIndex<BigSlots>(9), // (0x1) SlotDebugData { name: "", ty: Bool },
value: 0x0,
},
2: Copy {
dest: StatePartIndex<BigSlots>(4), // (0x7) SlotDebugData { name: "", ty: UInt<3> },
src: StatePartIndex<BigSlots>(3), // (0x7) SlotDebugData { name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::b", ty: Enum {HdlNone, HdlSome(UInt<2>)} },
},
3: SliceInt {
dest: StatePartIndex<BigSlots>(5), // (0x3) SlotDebugData { name: "", ty: UInt<2> },
src: StatePartIndex<BigSlots>(4), // (0x7) SlotDebugData { name: "", ty: UInt<3> },
start: 1,
len: 2,
},
// at: module-XXXXXXXXXX.rs:3:1
4: AndBigWithSmallImmediate {
dest: StatePartIndex<SmallSlots>(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
lhs: StatePartIndex<BigSlots>(3), // (0x7) SlotDebugData { name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::b", ty: Enum {HdlNone, HdlSome(UInt<2>)} },
rhs: 0x1,
},
// at: module-XXXXXXXXXX.rs:1:1
5: Copy {
dest: StatePartIndex<BigSlots>(1), // (0x7) SlotDebugData { name: "", ty: UInt<3> },
src: StatePartIndex<BigSlots>(0), // (0x7) SlotDebugData { name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::a", ty: Enum {HdlNone, HdlSome(UInt<2>)} },
},
6: SliceInt {
dest: StatePartIndex<BigSlots>(2), // (0x3) SlotDebugData { name: "", ty: UInt<2> },
src: StatePartIndex<BigSlots>(1), // (0x7) SlotDebugData { name: "", ty: UInt<3> },
start: 1,
len: 2,
},
7: CmpEq {
dest: StatePartIndex<BigSlots>(11), // (0x1) SlotDebugData { name: "", ty: Bool },
lhs: StatePartIndex<BigSlots>(2), // (0x3) SlotDebugData { name: "", ty: UInt<2> },
rhs: StatePartIndex<BigSlots>(5), // (0x3) SlotDebugData { name: "", ty: UInt<2> },
},
8: CmpEq {
dest: StatePartIndex<BigSlots>(12), // (0x1) SlotDebugData { name: "", ty: Bool },
lhs: StatePartIndex<BigSlots>(1), // (0x7) SlotDebugData { name: "", ty: UInt<3> },
rhs: StatePartIndex<BigSlots>(4), // (0x7) SlotDebugData { name: "", ty: UInt<3> },
},
// at: module-XXXXXXXXXX.rs:9:1
9: Copy {
dest: StatePartIndex<BigSlots>(8), // (0x1) SlotDebugData { name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::bit_eq", ty: Bool },
src: StatePartIndex<BigSlots>(12), // (0x1) SlotDebugData { name: "", ty: Bool },
},
// at: module-XXXXXXXXXX.rs:2:1
10: AndBigWithSmallImmediate {
dest: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
lhs: StatePartIndex<BigSlots>(0), // (0x7) SlotDebugData { name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::a", ty: Enum {HdlNone, HdlSome(UInt<2>)} },
rhs: 0x1,
},
// at: module-XXXXXXXXXX.rs:1:1
11: BranchIfSmallNeImmediate {
target: 14,
lhs: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
rhs: 0x0,
},
12: BranchIfSmallNeImmediate {
target: 14,
lhs: StatePartIndex<SmallSlots>(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
rhs: 0x0,
},
13: Copy {
dest: StatePartIndex<BigSlots>(9), // (0x1) SlotDebugData { name: "", ty: Bool },
src: StatePartIndex<BigSlots>(10), // (0x1) SlotDebugData { name: "", ty: Bool },
},
14: BranchIfSmallNeImmediate {
target: 17,
lhs: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
rhs: 0x1,
},
15: BranchIfSmallNeImmediate {
target: 17,
lhs: StatePartIndex<SmallSlots>(1), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} },
rhs: 0x1,
},
16: Copy {
dest: StatePartIndex<BigSlots>(9), // (0x1) SlotDebugData { name: "", ty: Bool },
src: StatePartIndex<BigSlots>(11), // (0x1) SlotDebugData { name: "", ty: Bool },
},
// at: module-XXXXXXXXXX.rs:7:1
17: Copy {
dest: StatePartIndex<BigSlots>(6), // (0x1) SlotDebugData { name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::eq", ty: Bool },
src: StatePartIndex<BigSlots>(9), // (0x1) SlotDebugData { name: "", ty: Bool },
},
// at: module-XXXXXXXXXX.rs:8:1
18: Copy {
dest: StatePartIndex<BigSlots>(7), // (0x1) SlotDebugData { name: "InstantiatedModule(enum_structural_eq: enum_structural_eq).enum_structural_eq::structural_eq", ty: Bool },
src: StatePartIndex<BigSlots>(9), // (0x1) SlotDebugData { name: "", ty: Bool },
},
// at: module-XXXXXXXXXX.rs:1:1
19: Return,
],
..
},
pc: 19,
memory_write_log: [],
assert_failed_log: [],
memories: StatePart {
value: [],
},
small_slots: StatePart {
value: [
1,
1,
],
},
big_slots: StatePart {
value: [
7,
7,
3,
7,
7,
3,
1,
1,
1,
1,
1,
1,
1,
],
},
sim_only_slots: StatePart {
value: [],
},
},
io: Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
},
global_io: {},
main_module: SimulationModuleState {
base_targets: [
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.a,
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.b,
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.eq,
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.structural_eq,
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.bit_eq,
],
uninitialized_ios: {},
io_targets: {
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.a,
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.b,
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.bit_eq,
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.eq,
Instance {
name: <simulator>::enum_structural_eq,
instantiated: Module {
name: enum_structural_eq,
..
},
}.structural_eq,
},
did_initial_settle: true,
clocks_for_past: {},
},
extern_modules: [],
trace_decls: TraceModule {
name: "enum_structural_eq",
children: [
TraceModuleIO {
name: "a",
child: TraceEnumWithFields {
name: "a",
discriminant: TraceEnumDiscriminant {
location: TraceScalarId(0),
name: "$tag",
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
flow: Source,
},
non_empty_fields: [
TraceUInt {
location: TraceScalarId(1),
name: "HdlSome",
ty: UInt<2>,
flow: Source,
},
],
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
flow: Source,
},
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
flow: Source,
},
TraceModuleIO {
name: "b",
child: TraceEnumWithFields {
name: "b",
discriminant: TraceEnumDiscriminant {
location: TraceScalarId(2),
name: "$tag",
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
flow: Source,
},
non_empty_fields: [
TraceUInt {
location: TraceScalarId(3),
name: "HdlSome",
ty: UInt<2>,
flow: Source,
},
],
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
flow: Source,
},
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
flow: Source,
},
TraceModuleIO {
name: "eq",
child: TraceBool {
location: TraceScalarId(4),
name: "eq",
flow: Sink,
},
ty: Bool,
flow: Sink,
},
TraceModuleIO {
name: "structural_eq",
child: TraceBool {
location: TraceScalarId(5),
name: "structural_eq",
flow: Sink,
},
ty: Bool,
flow: Sink,
},
TraceModuleIO {
name: "bit_eq",
child: TraceBool {
location: TraceScalarId(6),
name: "bit_eq",
flow: Sink,
},
ty: Bool,
flow: Sink,
},
],
},
traces: [
SimTrace {
id: TraceScalarId(0),
kind: EnumDiscriminant {
index: StatePartIndex<SmallSlots>(0),
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
},
maybe_changed: true,
state: 0x1,
last_state: 0x1,
},
SimTrace {
id: TraceScalarId(1),
kind: BigUInt {
index: StatePartIndex<BigSlots>(2),
ty: UInt<2>,
},
maybe_changed: true,
state: 0x3,
last_state: 0x3,
},
SimTrace {
id: TraceScalarId(2),
kind: EnumDiscriminant {
index: StatePartIndex<SmallSlots>(1),
ty: Enum {
HdlNone,
HdlSome(UInt<2>),
},
},
maybe_changed: true,
state: 0x1,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(3),
kind: BigUInt {
index: StatePartIndex<BigSlots>(5),
ty: UInt<2>,
},
maybe_changed: true,
state: 0x3,
last_state: 0x3,
},
SimTrace {
id: TraceScalarId(4),
kind: BigBool {
index: StatePartIndex<BigSlots>(6),
},
maybe_changed: true,
state: 0x1,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(5),
kind: BigBool {
index: StatePartIndex<BigSlots>(7),
},
maybe_changed: true,
state: 0x1,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(6),
kind: BigBool {
index: StatePartIndex<BigSlots>(8),
},
maybe_changed: true,
state: 0x1,
last_state: 0x0,
},
],
trace_memories: {},
trace_writers: [
Running(
VcdWriter {
finished_init: true,
timescale: 1 ps,
..
},
),
],
clocks_triggered: [],
event_queue: EventQueue(EventQueueData {
instant: 64 μs,
events: {},
}),
waiting_sensitivity_sets_by_address: {},
waiting_sensitivity_sets_by_compiled_value: {},
asserts: [],
..
}
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