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2 commits

Author SHA1 Message Date
Tobias Alexandra Platen
9da113b53e remove XdcCreateClockAnnotation, XdcIOStandardAnnotation and XdcLocationAnnotation 2026-01-21 20:13:06 +01:00
Tobias Alexandra Platen
ad5e7e29e9 copy vendor/xilinx to vendor/lattice 2026-01-21 20:00:29 +01:00
5 changed files with 326 additions and 105 deletions

View file

@ -2,11 +2,14 @@
// See Notices.txt for copyright information
pub mod xilinx;
pub mod lattice;
pub(crate) fn built_in_job_kinds() -> impl IntoIterator<Item = crate::build::DynJobKind> {
xilinx::built_in_job_kinds()
xilinx::built_in_job_kinds();
lattice::built_in_job_kinds()
}
pub(crate) fn built_in_platforms() -> impl IntoIterator<Item = crate::platform::DynPlatform> {
xilinx::built_in_platforms()
xilinx::built_in_platforms();
lattice::built_in_platforms()
}

View file

@ -12,4 +12,180 @@ use ordered_float::NotNan;
use serde::{Deserialize, Serialize};
use std::fmt;
// copy of xilinx.rs with same header
pub mod orangecrab;
pub mod primitives;
pub mod yosys_nextpnr;
/* fixme make_annotation_enum! {
#[non_exhaustive]
pub enum LatticeAnnotation {
XdcIOStandard(XdcIOStandardAnnotation),
XdcLocation(XdcLocationAnnotation),
XdcCreateClock(XdcCreateClockAnnotation),
}
} */
#[derive(Clone, PartialEq, Eq, Hash, Debug, clap::Args)]
pub struct LatticeArgs {
#[arg(long)]
pub device: Option<Device>,
}
impl LatticeArgs {
pub fn require_device(
&self,
platform: Option<&DynPlatform>,
global_params: &GlobalParams,
) -> clap::error::Result<Device> {
if let Some(device) = self.device {
return Ok(device);
}
if let Some(device) =
platform.and_then(|platform| platform.aspects().get_single_by_type::<Device>().copied())
{
return Ok(device);
}
Err(global_params.clap_error(
clap::error::ErrorKind::MissingRequiredArgument,
"missing --device option",
))
}
}
impl ToArgs for LatticeArgs {
fn to_args(&self, args: &mut (impl WriteArgs + ?Sized)) {
if let Some(device) = self.device {
args.write_long_option_eq("device", device.as_str());
}
}
}
macro_rules! make_device_enum {
($vis:vis enum $Device:ident {
$(
#[
name = $name:literal,
xray_part = $xray_part:literal,
xray_device = $xray_device:literal,
xray_family = $xray_family:literal,
]
$variant:ident,
)*
}) => {
#[derive(Copy, Clone, PartialEq, Eq, Hash, Debug, ValueEnum)]
$vis enum $Device {
$(
#[value(name = $name, alias = $xray_part)]
$variant,
)*
}
impl $Device {
$vis fn as_str(self) -> &'static str {
match self {
$(Self::$variant => $name,)*
}
}
$vis fn xray_part(self) -> &'static str {
match self {
$(Self::$variant => $xray_part,)*
}
}
$vis fn xray_device(self) -> &'static str {
match self {
$(Self::$variant => $xray_device,)*
}
}
$vis fn xray_family(self) -> &'static str {
match self {
$(Self::$variant => $xray_family,)*
}
}
}
struct DeviceVisitor;
impl<'de> serde::de::Visitor<'de> for DeviceVisitor {
type Value = $Device;
fn expecting(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
f.write_str("a Lattice device string")
}
fn visit_str<E>(self, v: &str) -> Result<Self::Value, E>
where
E: serde::de::Error,
{
match $Device::from_str(v, false) {
Ok(v) => Ok(v),
Err(_) => Err(E::invalid_value(serde::de::Unexpected::Str(v), &self)),
}
}
fn visit_bytes<E>(self, v: &[u8]) -> Result<Self::Value, E>
where
E: serde::de::Error,
{
match str::from_utf8(v).ok().and_then(|v| $Device::from_str(v, false).ok()) {
Some(v) => Ok(v),
None => Err(E::invalid_value(serde::de::Unexpected::Bytes(v), &self)),
}
}
}
impl<'de> Deserialize<'de> for $Device {
fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>
where
D: serde::Deserializer<'de>,
{
deserializer.deserialize_string(DeviceVisitor)
}
}
impl Serialize for $Device {
fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
where
S: serde::Serializer,
{
self.as_str().serialize(serializer)
}
}
};
}
make_device_enum! {
pub enum Device {
#[
name = "xc7a35ticsg324-1L",
xray_part = "xc7a35tcsg324-1",
xray_device = "xc7a35t",
xray_family = "artix7",
]
Xc7a35ticsg324_1l,
#[
name = "xc7a100ticsg324-1L",
xray_part = "xc7a100tcsg324-1",
xray_device = "xc7a100t",
xray_family = "artix7",
]
Xc7a100ticsg324_1l,
}
}
impl fmt::Display for Device {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
f.write_str(self.as_str())
}
}
pub(crate) fn built_in_job_kinds() -> impl IntoIterator<Item = crate::build::DynJobKind> {
orangecrab::built_in_job_kinds()
.into_iter()
.chain(yosys_nextpnr::built_in_job_kinds())
}
pub(crate) fn built_in_platforms() -> impl IntoIterator<Item = crate::platform::DynPlatform> {
orangecrab::built_in_platforms()
.into_iter()
.chain(yosys_nextpnr::built_in_platforms())
}

View file

@ -10,15 +10,15 @@ use crate::{
peripherals::{ClockInput, Led, RgbLed, Uart},
},
prelude::*,
vendor::xilinx::{
Device, XdcCreateClockAnnotation, XdcIOStandardAnnotation, XdcLocationAnnotation,
vendor::lattice::{
Device,
primitives,
},
};
use ordered_float::NotNan;
use std::sync::OnceLock;
macro_rules! arty_a7_platform {
macro_rules! orangecrab_platform {
(
$vis:vis enum $ArtyA7Platform:ident {
$(#[name = $name:literal, device = $device:ident]
@ -55,7 +55,7 @@ macro_rules! arty_a7_platform {
};
}
arty_a7_platform! {
orangecrab_platform! {
pub enum ArtyA7Platform {
#[name = "arty-a7-35t", device = Xc7a35ticsg324_1l]
ArtyA7_35T,
@ -129,8 +129,8 @@ fn reset_sync() {
#[hdl]
let out: SyncReset = m.output();
m.annotate_module(BlackBoxInlineAnnotation {
path: "fayalite_arty_a7_reset_sync.v".intern(),
text: r#"module __fayalite_arty_a7_reset_sync(input clk, input inp, output out);
path: "fayalite_orangecrab_reset_sync.v".intern(),
text: r#"module __fayalite_orangecrab_reset_sync(input clk, input inp, output out);
wire reset_0_out;
(* ASYNC_REG = "TRUE" *)
FDPE #(
@ -156,7 +156,7 @@ endmodule
"#
.intern(),
});
m.verilog_name("__fayalite_arty_a7_reset_sync");
m.verilog_name("__fayalite_orangecrab_reset_sync");
}
impl Platform for ArtyA7Platform {
@ -222,18 +222,18 @@ impl Platform for ArtyA7Platform {
} = peripherals;
let make_buffered_input = |name: &str, location: &str, io_standard: &str, invert: bool| {
let pin = m.input_with_loc(name, SourceLocation::builtin(), Bool);
annotate(
/* fixme annotate(
pin,
XdcLocationAnnotation {
location: location.intern(),
},
);
annotate(
); */
/* fixme annotate(
pin,
XdcIOStandardAnnotation {
value: io_standard.intern(),
},
);
); */
let buf = instance_with_loc(
&format!("{name}_buf"),
primitives::IBUF(),
@ -244,7 +244,7 @@ impl Platform for ArtyA7Platform {
};
let make_buffered_output = |name: &str, location: &str, io_standard: &str| {
let pin = m.output_with_loc(name, SourceLocation::builtin(), Bool);
annotate(
/* fixme annotate(
pin,
XdcLocationAnnotation {
location: location.intern(),
@ -255,7 +255,7 @@ impl Platform for ArtyA7Platform {
XdcIOStandardAnnotation {
value: io_standard.intern(),
},
);
); */
let buf = instance_with_loc(
&format!("{name}_buf"),
primitives::OBUFT(),
@ -301,13 +301,14 @@ impl Platform for ArtyA7Platform {
Clock,
);
connect(clk_in, clk_global_buf_in);
/* fixme
annotate(
clk_in,
XdcCreateClockAnnotation {
period: NotNan::new(1e9 / (100e6 / prev_divisor as f64))
.expect("known to be valid"),
},
);
); */
annotate(clk_in, DontTouchAnnotation);
let cd = wire_with_loc(
&format!("clk_div_{prev_divisor}_in"),
@ -326,12 +327,12 @@ impl Platform for ArtyA7Platform {
connect(clk_global_buf.I, clk_global_buf_in);
let clk_out = wire_with_loc("clk_out", SourceLocation::builtin(), Clock);
connect(clk_out, clk_global_buf.O);
annotate(
/* fixme annotate(
clk_out,
XdcCreateClockAnnotation {
period: NotNan::new(1e9 / frequency).expect("known to be valid"),
},
);
); */
annotate(clk_out, DontTouchAnnotation);
if let Some(clk) = clk {
connect(clk.instance_io_field().clk, clk_out);

View file

@ -5,6 +5,46 @@
use crate::prelude::*;
//#[hdl_module(extern)]
//pub fn PLACEHOLDER() {
//do this first
#[hdl_module(extern)]
pub fn IBUF() {
m.verilog_name("IBUF");
#[hdl]
let O: Bool = m.output();
#[hdl]
let I: Bool = m.input();
}
#[hdl_module(extern)]
pub fn OBUFT() {
m.verilog_name("OBUFT");
#[hdl]
let O: Bool = m.output();
#[hdl]
let I: Bool = m.input();
#[hdl]
let T: Bool = m.input();
}
#[hdl_module(extern)]
pub fn BUFGCE() {
m.verilog_name("BUFGCE");
#[hdl]
let O: Clock = m.output();
#[hdl]
let CE: Bool = m.input();
#[hdl]
let I: Clock = m.input();
}
#[hdl_module(extern)]
pub fn STARTUPE2_default_inputs() {
m.verilog_name("STARTUPE2");
#[hdl]
let CFGCLK: Clock = m.output();
#[hdl]
let CFGMCLK: Clock = m.output();
#[hdl]
let EOS: Bool = m.output();
#[hdl]
let PREQ: Bool = m.output();
}

View file

@ -24,8 +24,8 @@ use crate::{
source_location::SourceLocation,
util::{HashSet, job_server::AcquiredJob},
vendor::lattice::{
Device, XdcCreateClockAnnotation, XdcIOStandardAnnotation, XdcLocationAnnotation,
LatticeAnnotation, LatticeArgs,
Device,
/* fixme LatticeAnnotation,*/ LatticeArgs,
},
};
use eyre::Context;
@ -39,26 +39,26 @@ use std::{
};
#[derive(Copy, Clone, PartialEq, Eq, PartialOrd, Ord, Debug, Hash, Default)]
pub struct YosysNextpnrTrellisWriteYsFileJobKind;
pub struct YosysNextpnrXrayWriteYsFileJobKind;
#[derive(Clone, PartialEq, Eq, Hash, Debug, clap::Args)]
pub struct YosysNextpnrTrellisWriteYsFileArgs {}
pub struct YosysNextpnrXrayWriteYsFileArgs {}
impl ToArgs for YosysNextpnrTrellisWriteYsFileArgs {
impl ToArgs for YosysNextpnrXrayWriteYsFileArgs {
fn to_args(&self, _args: &mut (impl WriteArgs + ?Sized)) {
let Self {} = self;
}
}
#[derive(Clone, PartialEq, Eq, Hash, Debug, Serialize, Deserialize)]
pub struct YosysNextpnrTrellisWriteYsFile {
pub struct YosysNextpnrXrayWriteYsFile {
main_verilog_file: Interned<Path>,
ys_file: Interned<Path>,
json_file: Interned<Path>,
json_file_name: Interned<OsStr>,
}
impl YosysNextpnrTrellisWriteYsFile {
impl YosysNextpnrXrayWriteYsFile {
pub fn main_verilog_file(&self) -> Interned<Path> {
self.main_verilog_file
}
@ -101,9 +101,9 @@ impl YosysNextpnrTrellisWriteYsFile {
}
}
impl JobKind for YosysNextpnrTrellisWriteYsFileJobKind {
type Args = YosysNextpnrTrellisWriteYsFileArgs;
type Job = YosysNextpnrTrellisWriteYsFile;
impl JobKind for YosysNextpnrXrayWriteYsFileJobKind {
type Args = YosysNextpnrXrayWriteYsFileArgs;
type Job = YosysNextpnrXrayWriteYsFile;
type Dependencies = JobKindAndDependencies<VerilogJobKind>;
fn dependencies(self) -> Self::Dependencies {
@ -123,11 +123,11 @@ impl JobKind for YosysNextpnrTrellisWriteYsFileJobKind {
.verilog_dialect
.get_or_insert(VerilogDialect::Yosys);
args.args_to_jobs_simple(params, global_params, |_kind, args, dependencies| {
let YosysNextpnrTrellisWriteYsFileArgs {} = args;
let YosysNextpnrXrayWriteYsFileArgs {} = args;
let base_job = dependencies.get_job::<BaseJob, _>();
let verilog_job = dependencies.get_job::<VerilogJob, _>();
let json_file = base_job.file_with_ext("json");
Ok(YosysNextpnrTrellisWriteYsFile {
Ok(YosysNextpnrXrayWriteYsFile {
main_verilog_file: verilog_job.main_verilog_file(),
ys_file: base_job.file_with_ext("ys"),
json_file,
@ -150,7 +150,7 @@ impl JobKind for YosysNextpnrTrellisWriteYsFileJobKind {
}
fn name(self) -> Interned<str> {
"yosys-nextpnr-trellis-write-ys-file".intern()
"yosys-nextpnr-xray-write-ys-file".intern()
}
fn external_command_params(self, _job: &Self::Job) -> Option<CommandParams> {
@ -188,26 +188,26 @@ impl JobKind for YosysNextpnrTrellisWriteYsFileJobKind {
}
#[derive(Clone, PartialEq, Eq, Hash, Debug, clap::Args)]
pub struct YosysNextpnrTrellisSynthArgs {}
pub struct YosysNextpnrXraySynthArgs {}
impl ToArgs for YosysNextpnrTrellisSynthArgs {
impl ToArgs for YosysNextpnrXraySynthArgs {
fn to_args(&self, _args: &mut (impl WriteArgs + ?Sized)) {
let Self {} = self;
}
}
#[derive(Clone, PartialEq, Eq, Hash, Deserialize, Serialize)]
pub struct YosysNextpnrTrellisSynth {
pub struct YosysNextpnrXraySynth {
#[serde(flatten)]
write_ys_file: YosysNextpnrTrellisWriteYsFile,
write_ys_file: YosysNextpnrXrayWriteYsFile,
ys_file_name: Interned<OsStr>,
}
impl fmt::Debug for YosysNextpnrTrellisSynth {
impl fmt::Debug for YosysNextpnrXraySynth {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
let Self {
write_ys_file:
YosysNextpnrTrellisWriteYsFile {
YosysNextpnrXrayWriteYsFile {
main_verilog_file,
ys_file,
json_file,
@ -215,7 +215,7 @@ impl fmt::Debug for YosysNextpnrTrellisSynth {
},
ys_file_name,
} = self;
f.debug_struct("YosysNextpnrTrellisSynth")
f.debug_struct("YosysNextpnrXraySynth")
.field("main_verilog_file", main_verilog_file)
.field("ys_file", ys_file)
.field("ys_file_name", ys_file_name)
@ -225,7 +225,7 @@ impl fmt::Debug for YosysNextpnrTrellisSynth {
}
}
impl YosysNextpnrTrellisSynth {
impl YosysNextpnrXraySynth {
pub fn main_verilog_file(&self) -> Interned<Path> {
self.write_ys_file.main_verilog_file()
}
@ -252,15 +252,15 @@ impl ExternalProgramTrait for Yosys {
}
}
impl ExternalCommand for YosysNextpnrTrellisSynth {
type AdditionalArgs = YosysNextpnrTrellisSynthArgs;
impl ExternalCommand for YosysNextpnrXraySynth {
type AdditionalArgs = YosysNextpnrXraySynthArgs;
type AdditionalJobData = Self;
type BaseJobPosition = GetJobPositionDependencies<
GetJobPositionDependencies<
GetJobPositionDependencies<<UnadjustedVerilog as ExternalCommand>::BaseJobPosition>,
>,
>;
type Dependencies = JobKindAndDependencies<YosysNextpnrTrellisWriteYsFileJobKind>;
type Dependencies = JobKindAndDependencies<YosysNextpnrXrayWriteYsFileJobKind>;
type ExternalProgram = Yosys;
fn dependencies() -> Self::Dependencies {
@ -276,7 +276,7 @@ impl ExternalCommand for YosysNextpnrTrellisSynth {
<Self::Dependencies as JobDependencies>::JobsAndKinds,
)> {
args.args_to_jobs_external_simple(params, global_params, |args, dependencies| {
let YosysNextpnrTrellisSynthArgs {} = args.additional_args;
let YosysNextpnrXraySynthArgs {} = args.additional_args;
Ok(Self {
write_ys_file: dependencies.job.job.clone(),
ys_file_name: dependencies
@ -318,7 +318,7 @@ impl ExternalCommand for YosysNextpnrTrellisSynth {
}
fn job_kind_name() -> Interned<str> {
"yosys-nextpnr-trellis-synth".intern()
"yosys-nextpnr-xray-synth".intern()
}
fn subcommand_hidden() -> bool {
@ -327,19 +327,19 @@ impl ExternalCommand for YosysNextpnrTrellisSynth {
}
#[derive(Copy, Clone, PartialEq, Eq, PartialOrd, Ord, Debug, Hash, Default)]
pub struct YosysNextpnrTrellisWriteXdcFileJobKind;
pub struct YosysNextpnrXrayWriteXdcFileJobKind;
#[derive(Clone, PartialEq, Eq, Hash, Debug, clap::Args)]
pub struct YosysNextpnrTrellisWriteXdcFileArgs {}
pub struct YosysNextpnrXrayWriteXdcFileArgs {}
impl ToArgs for YosysNextpnrTrellisWriteXdcFileArgs {
impl ToArgs for YosysNextpnrXrayWriteXdcFileArgs {
fn to_args(&self, _args: &mut (impl WriteArgs + ?Sized)) {
let Self {} = self;
}
}
#[derive(Clone, PartialEq, Eq, Hash, Debug, Serialize, Deserialize)]
pub struct YosysNextpnrTrellisWriteXdcFile {
pub struct YosysNextpnrXrayWriteXdcFile {
firrtl_export_options: crate::firrtl::ExportOptions,
output_dir: Interned<Path>,
xdc_file: Interned<Path>,
@ -486,7 +486,8 @@ impl<W: fmt::Write> Visitor for XdcFileWriter<W> {
Ok(())
}
fn visit_lattice_annotation(&mut self, v: &LatticeAnnotation) -> Result<(), Self::Error> {
/* FIXME fn visit_lattice_annotation(&mut self, v: &LatticeAnnotation) -> Result<(), Self::Error> {
fn todo(
msg: &str,
annotation: &LatticeAnnotation,
@ -595,17 +596,17 @@ impl<W: fmt::Write> Visitor for XdcFileWriter<W> {
}
}
}
}
} */
}
impl YosysNextpnrTrellisWriteXdcFile {
impl YosysNextpnrXrayWriteXdcFile {
fn write_xdc_contents_for_port_and_annotations(
&self,
output: &mut impl fmt::Write,
port: &ScalarizedModuleABIPort,
annotations: ScalarizedModuleABIAnnotations<'_>,
) -> Result<(), WriteXdcContentsError> {
for annotation in annotations {
/* fixme for annotation in annotations {
match annotation.annotation() {
Annotation::DontTouch(_)
| Annotation::SVAttribute(_)
@ -637,7 +638,7 @@ impl YosysNextpnrTrellisWriteXdcFile {
tcl_escape(port.scalarized_name()),
)?,
}
}
} */
Ok(())
}
fn write_xdc_contents(
@ -661,10 +662,10 @@ impl YosysNextpnrTrellisWriteXdcFile {
}
}
impl JobKind for YosysNextpnrTrellisWriteXdcFileJobKind {
type Args = YosysNextpnrTrellisWriteXdcFileArgs;
type Job = YosysNextpnrTrellisWriteXdcFile;
type Dependencies = JobKindAndDependencies<ExternalCommandJobKind<YosysNextpnrTrellisSynth>>;
impl JobKind for YosysNextpnrXrayWriteXdcFileJobKind {
type Args = YosysNextpnrXrayWriteXdcFileArgs;
type Job = YosysNextpnrXrayWriteXdcFile;
type Dependencies = JobKindAndDependencies<ExternalCommandJobKind<YosysNextpnrXraySynth>>;
fn dependencies(self) -> Self::Dependencies {
Default::default()
@ -685,9 +686,9 @@ impl JobKind for YosysNextpnrTrellisWriteXdcFileJobKind {
.args
.export_options;
args.args_to_jobs_simple(params, global_params, |_kind, args, dependencies| {
let YosysNextpnrTrellisWriteXdcFileArgs {} = args;
let YosysNextpnrXrayWriteXdcFileArgs {} = args;
let base_job = dependencies.get_job::<BaseJob, _>();
Ok(YosysNextpnrTrellisWriteXdcFile {
Ok(YosysNextpnrXrayWriteXdcFile {
firrtl_export_options,
output_dir: base_job.output_dir(),
xdc_file: base_job.file_with_ext("xdc"),
@ -707,7 +708,7 @@ impl JobKind for YosysNextpnrTrellisWriteXdcFileJobKind {
}
fn name(self) -> Interned<str> {
"yosys-nextpnr-trellis-write-xdc-file".intern()
"yosys-nextpnr-xray-write-xdc-file".intern()
}
fn external_command_params(self, _job: &Self::Job) -> Option<CommandParams> {
@ -739,12 +740,12 @@ pub struct NextpnrLattice;
impl ExternalProgramTrait for NextpnrLattice {
fn default_program_name() -> Interned<str> {
"nextpnr-lattice".intern()
"nextpnr".intern()
}
}
#[derive(Clone, PartialEq, Eq, Hash, Debug, clap::Args)]
pub struct YosysNextpnrTrellisRunNextpnrArgs {
pub struct YosysNextpnrXrayRunNextpnrArgs {
#[command(flatten)]
pub common: LatticeArgs,
#[arg(long, env = "CHIPDB_DIR", value_hint = clap::ValueHint::DirPath)]
@ -753,7 +754,7 @@ pub struct YosysNextpnrTrellisRunNextpnrArgs {
pub nextpnr_lattice_seed: i32,
}
impl ToArgs for YosysNextpnrTrellisRunNextpnrArgs {
impl ToArgs for YosysNextpnrXrayRunNextpnrArgs {
fn to_args(&self, args: &mut (impl WriteArgs + ?Sized)) {
let Self {
common,
@ -767,7 +768,7 @@ impl ToArgs for YosysNextpnrTrellisRunNextpnrArgs {
}
#[derive(Clone, PartialEq, Eq, Hash, Debug, Serialize, Deserialize)]
pub struct YosysNextpnrTrellisRunNextpnr {
pub struct YosysNextpnrXrayRunNextpnr {
nextpnr_lattice_chipdb_dir: Interned<Path>,
device: Device,
nextpnr_lattice_seed: i32,
@ -781,23 +782,23 @@ pub struct YosysNextpnrTrellisRunNextpnr {
fasm_file_name: Interned<OsStr>,
}
impl YosysNextpnrTrellisRunNextpnr {
impl YosysNextpnrXrayRunNextpnr {
fn chipdb_file(&self) -> Interned<Path> {
let mut retval = self
.nextpnr_lattice_chipdb_dir
.join(self.device.trellis_device());
.join(self.device.xray_device());
retval.set_extension("bin");
retval.intern_deref()
}
}
impl ExternalCommand for YosysNextpnrTrellisRunNextpnr {
type AdditionalArgs = YosysNextpnrTrellisRunNextpnrArgs;
impl ExternalCommand for YosysNextpnrXrayRunNextpnr {
type AdditionalArgs = YosysNextpnrXrayRunNextpnrArgs;
type AdditionalJobData = Self;
type BaseJobPosition = GetJobPositionDependencies<
GetJobPositionDependencies<<YosysNextpnrTrellisSynth as ExternalCommand>::BaseJobPosition>,
GetJobPositionDependencies<<YosysNextpnrXraySynth as ExternalCommand>::BaseJobPosition>,
>;
type Dependencies = JobKindAndDependencies<YosysNextpnrTrellisWriteXdcFileJobKind>;
type Dependencies = JobKindAndDependencies<YosysNextpnrXrayWriteXdcFileJobKind>;
type ExternalProgram = NextpnrLattice;
fn dependencies() -> Self::Dependencies {
@ -813,14 +814,14 @@ impl ExternalCommand for YosysNextpnrTrellisRunNextpnr {
<Self::Dependencies as JobDependencies>::JobsAndKinds,
)> {
args.args_to_jobs_external_simple(params, global_params, |args, dependencies| {
let YosysNextpnrTrellisRunNextpnrArgs {
let YosysNextpnrXrayRunNextpnrArgs {
common,
nextpnr_lattice_chipdb_dir,
nextpnr_lattice_seed,
} = args.additional_args;
let base_job = dependencies.get_job::<BaseJob, _>();
let write_xdc_file = dependencies.get_job::<YosysNextpnrTrellisWriteXdcFile, _>();
let synth = dependencies.get_job::<ExternalCommandJob<YosysNextpnrTrellisSynth>, _>();
let write_xdc_file = dependencies.get_job::<YosysNextpnrXrayWriteXdcFile, _>();
let synth = dependencies.get_job::<ExternalCommandJob<YosysNextpnrXraySynth>, _>();
let routed_json_file = base_job.file_with_ext("routed.json");
let fasm_file = base_job.file_with_ext("fasm");
Ok(Self {
@ -867,7 +868,7 @@ impl ExternalCommand for YosysNextpnrTrellisRunNextpnr {
}
fn command_line_args<W: ?Sized + WriteArgs>(job: &ExternalCommandJob<Self>, args: &mut W) {
let job_data @ YosysNextpnrTrellisRunNextpnr {
let job_data @ YosysNextpnrXrayRunNextpnr {
nextpnr_lattice_seed,
xdc_file_name,
json_file_name,
@ -888,7 +889,7 @@ impl ExternalCommand for YosysNextpnrTrellisRunNextpnr {
}
fn job_kind_name() -> Interned<str> {
"yosys-nextpnr-trellis-run-nextpnr".intern()
"yosys-nextpnr-xray-run-nextpnr".intern()
}
fn subcommand_hidden() -> bool {
@ -906,21 +907,21 @@ impl ExternalProgramTrait for Xcfasm {
}
#[derive(Clone, PartialEq, Eq, Hash, Debug, clap::Args)]
pub struct YosysNextpnrTrellisArgs {
pub struct YosysNextpnrXrayArgs {
#[arg(long, env = "DB_DIR", value_hint = clap::ValueHint::DirPath)]
pub prjtrellis_db_dir: PathBuf,
pub prjxray_db_dir: PathBuf,
}
impl ToArgs for YosysNextpnrTrellisArgs {
impl ToArgs for YosysNextpnrXrayArgs {
fn to_args(&self, args: &mut (impl WriteArgs + ?Sized)) {
let Self { prjtrellis_db_dir } = self;
args.write_long_option_eq("prjtrellis-db-dir", prjtrellis_db_dir);
let Self { prjxray_db_dir } = self;
args.write_long_option_eq("prjxray-db-dir", prjxray_db_dir);
}
}
#[derive(Clone, PartialEq, Eq, Hash, Debug, Serialize, Deserialize)]
pub struct YosysNextpnrTrellis {
prjtrellis_db_dir: Interned<Path>,
pub struct YosysNextpnrXray {
prjxray_db_dir: Interned<Path>,
device: Device,
fasm_file: Interned<Path>,
fasm_file_name: Interned<OsStr>,
@ -930,27 +931,27 @@ pub struct YosysNextpnrTrellis {
bit_file_name: Interned<OsStr>,
}
impl YosysNextpnrTrellis {
impl YosysNextpnrXray {
fn db_root(&self) -> Interned<Path> {
self.prjtrellis_db_dir
.join(self.device.trellis_family())
self.prjxray_db_dir
.join(self.device.xray_family())
.intern_deref()
}
fn part_file(&self) -> Interned<Path> {
let mut retval = self.prjtrellis_db_dir.join(self.device.trellis_family());
retval.push(self.device.trellis_part());
let mut retval = self.prjxray_db_dir.join(self.device.xray_family());
retval.push(self.device.xray_part());
retval.push("part.yaml");
retval.intern_deref()
}
}
impl ExternalCommand for YosysNextpnrTrellis {
type AdditionalArgs = YosysNextpnrTrellisArgs;
impl ExternalCommand for YosysNextpnrXray {
type AdditionalArgs = YosysNextpnrXrayArgs;
type AdditionalJobData = Self;
type BaseJobPosition = GetJobPositionDependencies<
<YosysNextpnrTrellisRunNextpnr as ExternalCommand>::BaseJobPosition,
<YosysNextpnrXrayRunNextpnr as ExternalCommand>::BaseJobPosition,
>;
type Dependencies = JobKindAndDependencies<ExternalCommandJobKind<YosysNextpnrTrellisRunNextpnr>>;
type Dependencies = JobKindAndDependencies<ExternalCommandJobKind<YosysNextpnrXrayRunNextpnr>>;
type ExternalProgram = Xcfasm;
fn dependencies() -> Self::Dependencies {
@ -966,12 +967,12 @@ impl ExternalCommand for YosysNextpnrTrellis {
<Self::Dependencies as JobDependencies>::JobsAndKinds,
)> {
args.args_to_jobs_external_simple(params, global_params, |args, dependencies| {
let YosysNextpnrTrellisArgs { prjtrellis_db_dir } = args.additional_args;
let YosysNextpnrXrayArgs { prjxray_db_dir } = args.additional_args;
let base_job = dependencies.get_job::<BaseJob, _>();
let frames_file = base_job.file_with_ext("frames");
let bit_file = base_job.file_with_ext("bit");
Ok(Self {
prjtrellis_db_dir: prjtrellis_db_dir.intern_deref(),
prjxray_db_dir: prjxray_db_dir.intern_deref(),
device: dependencies.job.job.additional_job_data().device,
fasm_file: dependencies.job.job.additional_job_data().fasm_file,
fasm_file_name: dependencies.job.job.additional_job_data().fasm_file_name,
@ -1003,7 +1004,7 @@ impl ExternalCommand for YosysNextpnrTrellis {
}
fn command_line_args<W: ?Sized + WriteArgs>(job: &ExternalCommandJob<Self>, args: &mut W) {
let job_data @ YosysNextpnrTrellis {
let job_data @ YosysNextpnrXray {
device,
fasm_file_name,
frames_file_name,
@ -1012,7 +1013,7 @@ impl ExternalCommand for YosysNextpnrTrellis {
} = job.additional_job_data();
args.write_arg("--sparse");
args.write_long_option_eq("db-root", job_data.db_root());
args.write_long_option_eq("part", device.trellis_part());
args.write_long_option_eq("part", device.xray_part());
args.write_long_option_eq("part_file", job_data.part_file());
args.write_long_option_eq("fn_in", fasm_file_name);
args.write_long_option_eq("frm_out", frames_file_name);
@ -1024,17 +1025,17 @@ impl ExternalCommand for YosysNextpnrTrellis {
}
fn job_kind_name() -> Interned<str> {
"yosys-nextpnr-trellis".intern()
"yosys-nextpnr-xray".intern()
}
}
pub(crate) fn built_in_job_kinds() -> impl IntoIterator<Item = DynJobKind> {
[
DynJobKind::new(YosysNextpnrTrellisWriteYsFileJobKind),
DynJobKind::new(ExternalCommandJobKind::<YosysNextpnrTrellisSynth>::new()),
DynJobKind::new(YosysNextpnrTrellisWriteXdcFileJobKind),
DynJobKind::new(ExternalCommandJobKind::<YosysNextpnrTrellisRunNextpnr>::new()),
DynJobKind::new(ExternalCommandJobKind::<YosysNextpnrTrellis>::new()),
DynJobKind::new(YosysNextpnrXrayWriteYsFileJobKind),
DynJobKind::new(ExternalCommandJobKind::<YosysNextpnrXraySynth>::new()),
DynJobKind::new(YosysNextpnrXrayWriteXdcFileJobKind),
DynJobKind::new(ExternalCommandJobKind::<YosysNextpnrXrayRunNextpnr>::new()),
DynJobKind::new(ExternalCommandJobKind::<YosysNextpnrXray>::new()),
]
}