114 commits

Author	SHA1	Message	Date
Jacob Lifshay	cf3e6cfc6b	Add .to_trace_as_string() and clean up code	2026-05-14 22:13:31 -07:00
Jacob Lifshay	ea183eac87	add TraceAsString<T> -- sim traces it as a string rather than all its internal fields	2026-05-13 19:43:50 -07:00
Jacob Lifshay	26224abe1c	sim: properly update all VCD wires when they share simulation state	2026-05-05 21:12:00 -07:00
Jacob Lifshay	7516ec3c24	implement #[hdl(cmp_eq)] for enums	2026-05-01 18:34:49 -07:00
Jacob Lifshay	8e4eeef723	add support for custom debug/display formatting of #[hdl] structs/enums ... also cleans up default debug formatting to use the struct/enum name (or MaskType<StructName>) instead of the implementation detail type name.	2026-04-30 23:10:49 -07:00
Jacob Lifshay	402f457c68	sim: Speed up updating traces by tracking which traces are written to	2026-04-30 19:12:20 -07:00
Jacob Lifshay	80b92c7dd3	change vcd output to have module contents under instance's name, more closely matching how it works in verilog	2026-03-26 18:21:14 -07:00
Jacob Lifshay	2aa41137d4	add simulator tests for queue()	2026-03-24 23:30:15 -07:00
Jacob Lifshay	a0b2dc085c	add test that simulator handles last-connect semantics properly	2026-03-24 23:29:30 -07:00
Jacob Lifshay	a8a541b357	sim/compiler: fix registers so they properly retain their old value when not written	2026-03-24 23:26:47 -07:00
Jacob Lifshay	a93e66d8ab	update ui test's expected output for having rust-src available	2026-03-17 20:43:46 -07:00
Jacob Lifshay	dbed947408	change VCD id generation to be based on hashing the path, making them better for git diff	2026-02-23 20:05:10 -08:00
Jacob Lifshay	8c270b0e35	silence warning for enums with only one variant	2026-02-23 16:07:05 -08:00
Jacob Lifshay	9db3240644	fix UI test's expected output	2026-02-03 18:00:36 -08:00
Jacob Lifshay	c97b44d9d6	simplify SimValue Debug format, making complex structures much easier to read	2025-12-14 20:59:48 -08:00
Jacob Lifshay	9e803223d0	support operations directly on SimValue, UIntValue, and SIntValue, and shared references to those	2025-11-24 00:14:53 -08:00
Jacob Lifshay	2817cd3d58	support Rust's default binding modes when destructuring with #[hdl(sim)] let/match	2025-11-14 00:20:54 -08:00
Jacob Lifshay	df020e9c9b	add ExternModuleSimulatorState::read_past() and more output when simulator trace is enabled	2025-11-12 22:31:45 -08:00
Jacob Lifshay	45fea70c18	add ExternModuleSimulationState::fork_join_scope	2025-11-07 02:18:43 -08:00
Jacob Lifshay	fbc8ffa5ae	fix private fields in #[hdl] pub struct	2025-11-06 20:23:16 -08:00
Jacob Lifshay	0b77d1bea0	fix Simulator panicking when you use PhantomConst	2025-11-05 22:44:43 -08:00
Jacob Lifshay	840c5e1895	add ExternModuleSimulationState::resettable helper for procedural simulations that have a reset input.	2025-11-03 23:59:36 -08:00
Jacob Lifshay	c11a1743f9	add sim.fork_join() and fix Simulator to handle running futures with arbitrary wakers	2025-10-30 21:16:05 -07:00
Jacob Lifshay	0b82178740	add PhantomConstGet to the known Type bounds for #[hdl] struct/enum	2025-10-27 20:08:22 -07:00
Jacob Lifshay	094c77e26e	add #[hdl(get(|v| ...))] type GetStuff<P: PhantomConstGet<MyStruct>> = MyType or DynSize;	2025-10-26 03:25:35 -07:00
Jacob Lifshay	7dc4417874	add test_many_memories so we catch if memories are iterated in an inconsistent order like in 838bd469ce	2025-10-24 01:40:30 -07:00
Jacob Lifshay	b6e4cd0614	move FormalMode to crate::testing and add to prelude	2025-10-24 00:14:04 -07:00
Jacob Lifshay	3f5dd61e46	WIP adding Platform	2025-10-17 05:55:22 -07:00
Jacob Lifshay	a565be1b09	do some clean up	2025-10-16 04:32:56 -07:00
Jacob Lifshay	7af9abfb6f	switch to using new crate::build system	2025-10-15 04:29:00 -07:00
Jacob Lifshay	db9b1c202c	add simulator support for sim-only values	2025-09-08 22:19:43 -07:00
Jacob Lifshay	67e66ac3bd	upgrade to rust 1.89.0	2025-08-24 15:53:21 -07:00
Jacob Lifshay	e0c9939147	add test that SimValue can't be interned, since its PartialEq may ignore types	2025-04-09 19:55:09 -07:00
Jacob Lifshay	001fd31451	add UIntInRange[Inclusive][Type]	2025-04-07 18:27:54 -07:00
Jacob Lifshay	57aae7b7fb	implement [de]serializing BaseTypes, SimValues, and support PhantomConst<T> in #[hdl] struct S<T>	2025-04-04 01:04:26 -07:00
Jacob Lifshay	6929352be7	re-export bitvec and add types useful for simulation to the prelude	2025-04-03 16:01:39 -07:00
Jacob Lifshay	c4b6a0fee6	add support for #[hdl(sim)] enum_ty.Variant(value) and #[hdl(sim)] EnumTy::Variant(value) and non-sim variants too	2025-04-01 22:16:47 -07:00
Jacob Lifshay	9092e45447	fix #[hdl(sim)] match on enums	2025-03-30 01:25:07 -07:00
Jacob Lifshay	a40eaaa2da	expand SimValue support	2025-03-30 00:55:38 -07:00
Jacob Lifshay	5028401a5a	change SimValue to contain and deref to a value and not just contain bits	2025-03-27 23:44:36 -07:00
Jacob Lifshay	fdc73b5f3b	add ripple counter test to test simulating alternating circuits and extern modules	2025-03-25 18:56:26 -07:00
Jacob Lifshay	a115585d5a	simulator: allow external module generators to wait for value changes and/or clock edges	2025-03-25 18:26:48 -07:00
Jacob Lifshay	ab9ff4f2db	simplify setting an extern module simulation	2025-03-21 17:08:29 -07:00
Jacob Lifshay	d1bd176b28	implement simulation of extern modules	2025-03-21 01:47:14 -07:00
Jacob Lifshay	3458c21f44	add #[hdl(cmp_eq)] to implement HdlPartialEq automatically	2025-02-16 20:48:16 -08:00
Jacob Lifshay	cdd84953d0	support unknown trait bounds in type parameters	2025-02-13 18:35:30 -08:00
Jacob Lifshay	86a1bb46be	add #[hdl] let destructuring and, while at it, tuple patterns	2025-02-10 22:49:41 -08:00
Jacob Lifshay	d4ea826051	sim: fix "label address not set" bug when the last Assignment is conditional	2025-01-15 19:04:40 -08:00
Jacob Lifshay	404a2ee043	tests/sim: add test_array_rw	2025-01-12 21:38:59 -08:00
Jacob Lifshay	e3a2ccd41c	properly handle duplicate names in vcd	2025-01-09 22:52:22 -08:00