forked from libre-chip/fayalite
Add .to_trace_as_string() and clean up code
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parent
ea183eac87
commit
cf3e6cfc6b
18 changed files with 894 additions and 255 deletions
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@ -13,7 +13,7 @@ use fayalite::{
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prelude::*,
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reset::ResetType,
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sim::vcd::VcdWriterDecls,
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ty::{SimValueDebug, StaticType, TraceAsString, TraceAsStringSimValue},
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ty::SimValueDebug,
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util::{RcWriter, ready_valid::queue},
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};
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use std::{collections::BTreeMap, num::NonZeroUsize, rc::Rc};
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@ -3019,6 +3019,9 @@ impl HasCustomDebug {
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}
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}
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}
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pub fn new(text: Result<&str, std::fmt::Error>) -> Expr<Self> {
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Self::new_sim(text).to_expr()
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}
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}
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impl SimValueDebug for HasCustomDebug {
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@ -3061,10 +3064,7 @@ pub fn sim_trace_as_string() {
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#[hdl]
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let write: WriteStruct<Array<TraceAsString<HasCustomDebug>, 2>, ConstUsize<8>> = m.input();
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#[hdl]
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let mut mem = memory_with_init(
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[[Expr::as_trace_as_string(HasCustomDebug::new_sim(Ok("")).to_expr(), StaticType::TYPE); 2];
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4],
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);
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let mut mem = memory_with_init([[HasCustomDebug::new(Ok("")).to_trace_as_string(); 2]; 4]);
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let read_port = mem.new_read_port();
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connect(read_port.clk, clk);
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connect_any(read_port.addr, read.addr);
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@ -3156,7 +3156,7 @@ fn test_sim_trace_as_string() {
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sim.write(sim.io().write.en, write_addr.is_some());
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sim.write(
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sim.io().write.data,
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write_data.map(|v| TraceAsStringSimValue::new(HasCustomDebug::new_sim(v))),
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write_data.map(|v| HasCustomDebug::new_sim(v).to_trace_as_string()),
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);
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sim.write(
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sim.io().write.mask,
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@ -3172,7 +3172,7 @@ fn test_sim_trace_as_string() {
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.map(HasCustomDebug::new_sim)
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.into_sim_value();
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assert!(
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**read_data == *expected_read_data,
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*read_data.inner() == expected_read_data,
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"{read_data:#?}\n!= {expected_read_data:#?}",
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);
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}
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@ -55,7 +55,7 @@ error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'sta
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note: required because it appears within the type `DynSimOnlyValue`
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--> src/sim/value/sim_only_value_unsafe.rs
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271 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
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281 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
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| ^^^^^^^^^^^^^^^
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note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
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--> $RUST/core/src/marker.rs
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@ -75,12 +75,12 @@ note: required because it appears within the type `Vec<DynSimOnlyValue>`
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note: required because it appears within the type `OpaqueSimValue`
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--> src/ty.rs
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895 | pub struct OpaqueSimValue {
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896 | pub struct OpaqueSimValue {
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| ^^^^^^^^^^^^^^
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note: required because it appears within the type `value::SimValueInner<()>`
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--> src/sim/value.rs
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52 | struct SimValueInner<T: Type> {
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51 | struct SimValueInner<T: Type> {
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| ^^^^^^^^^^^^^
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note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
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--> $RUST/core/src/cell.rs
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@ -95,7 +95,7 @@ note: required because it appears within the type `util::alternating_cell::Alter
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note: required because it appears within the type `fayalite::prelude::SimValue<()>`
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--> src/sim/value.rs
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161 | pub struct SimValue<T: Type> {
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160 | pub struct SimValue<T: Type> {
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| ^^^^^^^^
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note: required by a bound in `fayalite::intern::Interned`
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--> src/intern.rs
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@ -194,7 +194,7 @@ error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'sta
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note: required because it appears within the type `DynSimOnlyValue`
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--> src/sim/value/sim_only_value_unsafe.rs
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271 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
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281 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
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| ^^^^^^^^^^^^^^^
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note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
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--> $RUST/core/src/marker.rs
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@ -214,12 +214,12 @@ note: required because it appears within the type `Vec<DynSimOnlyValue>`
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note: required because it appears within the type `OpaqueSimValue`
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--> src/ty.rs
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895 | pub struct OpaqueSimValue {
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896 | pub struct OpaqueSimValue {
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| ^^^^^^^^^^^^^^
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note: required because it appears within the type `value::SimValueInner<()>`
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--> src/sim/value.rs
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52 | struct SimValueInner<T: Type> {
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51 | struct SimValueInner<T: Type> {
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| ^^^^^^^^^^^^^
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note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
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--> $RUST/core/src/cell.rs
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@ -234,7 +234,7 @@ note: required because it appears within the type `util::alternating_cell::Alter
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note: required because it appears within the type `fayalite::prelude::SimValue<()>`
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--> src/sim/value.rs
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161 | pub struct SimValue<T: Type> {
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160 | pub struct SimValue<T: Type> {
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| ^^^^^^^^
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note: required by a bound in `intern_sized`
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--> src/intern.rs
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@ -306,7 +306,7 @@ error[E0277]: `Rc<(dyn value::sim_only_value_unsafe::DynSimOnlyValueTrait + 'sta
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note: required because it appears within the type `DynSimOnlyValue`
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--> src/sim/value/sim_only_value_unsafe.rs
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271 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
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281 | pub struct DynSimOnlyValue(Rc<dyn DynSimOnlyValueTrait>);
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| ^^^^^^^^^^^^^^^
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note: required because it appears within the type `PhantomData<DynSimOnlyValue>`
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--> $RUST/core/src/marker.rs
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@ -326,12 +326,12 @@ note: required because it appears within the type `Vec<DynSimOnlyValue>`
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note: required because it appears within the type `OpaqueSimValue`
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--> src/ty.rs
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895 | pub struct OpaqueSimValue {
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896 | pub struct OpaqueSimValue {
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| ^^^^^^^^^^^^^^
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note: required because it appears within the type `value::SimValueInner<()>`
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--> src/sim/value.rs
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52 | struct SimValueInner<T: Type> {
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51 | struct SimValueInner<T: Type> {
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| ^^^^^^^^^^^^^
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note: required because it appears within the type `UnsafeCell<value::SimValueInner<()>>`
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--> $RUST/core/src/cell.rs
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@ -346,7 +346,7 @@ note: required because it appears within the type `util::alternating_cell::Alter
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note: required because it appears within the type `fayalite::prelude::SimValue<()>`
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--> src/sim/value.rs
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161 | pub struct SimValue<T: Type> {
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160 | pub struct SimValue<T: Type> {
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| ^^^^^^^^
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note: required by a bound in `fayalite::intern::Interned`
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--> src/intern.rs
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