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tests/reg_alloc: remove simulator debug output

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This commit is contained in:
Jacob Lifshay 2025-02-06 21:31:05 -08:00
parent 7efcd872b5
commit 294e979848
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
2 changed files with 5 additions and 106619 deletions
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106614
crates/cpu/tests/expected/reg_alloc.txt
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10
crates/cpu/tests/reg_alloc.rs
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@ -3619,9 +3619,9 @@ circuit reg_alloc:
connect alloc_out[0].data, {|HdlNone, HdlSome: UInt<4>|}(HdlNone) @[unit_free_regs_tracker.rs 112:13]
",
};
let sim_debug = format!("{sim:#?}");
println!("#######\n{sim_debug}\n#######");
if sim_debug != include_str!("expected/reg_alloc.txt") {
panic!();
}
// let sim_debug = format!("{sim:#?}");
// println!("#######\n{sim_debug}\n#######");
// if sim_debug != include_str!("expected/reg_alloc.txt") {
// panic!();
// }
}